When uTracer11 has halted the micro machine and performs single steps, it displays CPU state and history in several panels.
To read first
For internal construction of PDP-11 CPUs, there are these sources of information:
The "Processor Maintenance Manuals" or "System Technical Manuals" explain CPU function and link to schematics in "FPMS" files.
See here for the PDP-11/34 KD11-E, for the PDP-11/40 KD11-B, . Check other files in the same directory.
Also important: Gordon Bells "Computer Engineering: A DEC View of Hardware Systems Design", for example here.
PDP-11 design is covered in Section III. Chapter 14 "Impact of Implementation: Design Tradeoffs on Performance" from page 327 explains how to build a good Data Path.
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Now for the cool part!
All panels here are only active when the CPU is micro-single-stepped.
History Trace
This table gives the history of micro-program execution, UNIBUS accesses, and disassembled opcodes. For each micro-stop and each UNIBUS one line is added.
For example you see here that the 11/34 is fetching an opcode at micro address 016, and later fetches more operands when opcode and operand field have been evaluated.
Micro program flow diagram
This show the current micro-steps highlighted in DECs micro program flow diagrams. The red "marker" will move on each single step.
(click image to enlarge)
In the example, the 11/34 micro machine is at step 016. It has fetched an opcode in step 015, is now decoding and incrementing the PC by two in parallel.
Micro word bit fields
For each micro program step an array of wires is set to certain levels and fired into Control Board and the Data Path board. Thes bitfields route 16 bit data packaets through the Datapath, and as well enable the micro program to branch or to delay.
(click image to enlarge)
Bits marked in "red" are different from their default state. Bitgroups are nicely decoded in the DEC dcos,. so theres more to highlight.
Note the important "NEXT MPC" field. Each micro step defines its normal "follow-on" step address , which can also be further modified by some conditions, given by the "BUT BITS".
"BUT "means: Branch on Micro Test.
Active Data Path components
This is an overview of the Data Path. It's mainly an internal circular bus, connecting Registers, ALUs, UNIBUS interface, and helper latches. Data flow is routed by lots of switches, which are driven by the micro word bit fields.
The next detail level of this diagram would be the actual PCB schematics.
(click image to enlarge)
By the way: "SPM" means "Scratch Pad Memory". Here we have 16 16-bit word memory, holding CPU registers and temporary values (for example address calculations and multiplication intermediate results)
Alas, I found this display less informative then expected. The reason is that data always flows through all components, and you don't see here wether they are actually doing some work, or are switched to "transparent" by the current micro word bit fields.
CPU state
As seen in the Data Path display, a CPU consists of many help registers: most notably the user visible CPU registers R0..R7, shadow registers R8..R15, UNIBUS Address/Data, also B, BX, AMUX, SSMUX and others for the ALU path, lots of Virtual Memory helpers, or the "IR" Instruction Register. Some of these are accessible over the Daignsoric Headers on M93X2 for physical PDP-11s, but *all* can be displayed if using a hardware-true simulator.
GUI queries what the current PDP-11-under-test has to offer here, and displays the internal CPU state on the "Signals" panel:
Some toughts
There is much more in DECs CPU documentation, these visualizations just scratch on the surface of whats possible. However workload to do these is challenging.
And as you know: DECs documentation is full of errors, not to mention my own sloppiness.
On the other hand, I found that these "animated documentations" are really an eye catcher and a great educational tool (if you have the right audience!)
In fact on Vintage Computer Festival Berlin 2024 , this exhibit won a visitors price.
Note that different PDP-11 models have a different style of documentation, giving more or lesser decumentation on the micro engine. The 11/34 is a lucky case!
However, other CPUs list their micro word bits in documenation ... the 11/34 doesn't.
I relied on an earlier project, where I soldered out all micro code ROMs and read their content.