Written by: Administrator
Parent Category: Diode ROM Book
Category: Stories

(written by John Seamons )

Introduction:

PUniBone is a name meaning a "point-to-point Unibus" implementation of the UniBone. Only the Unibus slots required to run a specific set of PDP-11 processor cards is supported. There are no other slots for memory or peripheral cards as would be present on a typical backplane of a PDP-11 system.
 
The purpose is to test and study cards from the KD11 TTL processor family used in the PDP-11/04 /34A and /44 systems, acquired during an age when it is increasing difficult to find and maintain complete PDP-11 systems. The UniBone is able to supply emulation of the required memory and peripheral devices. And the PUniBone extends that to providing a Unibus compatible processor slots and power supply.
 
The photo below shown the single KD11-D/M7263 processor card of the PDP-11/04 (data path plus control functions) installed into the first slot of the PUniBone. A BeagleBone Black plugs (inverted) into headers on the board. A few ICs and yellow Unibus termination resistors are also on the board. A high-efficiency 450 Watt PC power supply on the right (black box) plugs into an ATX connector.
 
PUniBone.11 04.photo small
 
 

Motivation:

For several years I have been studying in great detail some of the DEC TTL CPUs. Specifically certain implementations of the KD11 series used in the 11/04, /34A and /44. I own CPU card sets for each of these. But that is all, nothing else. No systems, peripherals, not even DEC backplanes or power supplies. And I have no interest in owing any of those things nor interest in the later LSI implementations.
 
This all has to do, like many of us, in how I got my start in computing nearly 50 years ago as a teenager. Back then I tried (and failed) to understand how the TTL CPUs worked. And now, in retirement, after a long and successful career in the industry I am returning to study the topic again. My ultimate goal is to create a follow-on KD11 CPU card using technology that might have been available in the mid to late 1980s had the transition to LSI / microprocessors not occurred. But that is another story.
 
Part of this study is creating a test bed to run the CPU cards. Naturally I discovered UniBone. I have previous experience in creating capes for the Beagle and in using the Beagle's PRU (see kiwisdr.com). So the UniBone was perfect for saving me some time. I'm very grateful for Joerg's brillant work.
 
 

Implementation:

I now have running a board which supports the 11/04 and /34A. A separate PCB for the /44 is in design. I call it the “PUniBone” because it implements a point-to-point Unibus, i.e. it supports no memory/peripheral slots and I am not using Unibus driver chips on the Beagle side. Also the word “puny” in English means small, which this project is.
 
I started this work before I learned about the QBone. I found it interesting that Joerg used CPLD/FPGAs as well. I use a single 5V/3.3V CPLD (Microchip/Atmel ATF1508) to drive the (point-to-point) Unibus directly. The second CPLD just connects to debug headers, the 11/04 and /34A debug connectors and row C halt request/grant signals. Sufficient to emulate, at some point perhaps, the M7859 programmer's console. The two CPU slots implement the /34A private inter-board interconnect on rows CDEF (data path to control board). Although I have not yet tried running the /34A boards I have.
 
Adapting the UniBone code for my particular CPLD hardware interface was straightforward. I used the same register layout as UniBone but there is a different (multiplexed) CPLD bus due to pinout limitations. This is easily handled by modified PRU code.
 
I also made changes that allow the UniBone code to run without any attached hardware at all. I used this mode to gain familiarity with the UniBone code while waiting for my PCB to be fabricated. I am working to get these changes from PUniBone (the useful ones at least) merged back into the QUniBone distribution.
 
Below is a plot of the PCB traces (top and bottom layers) and silkscreen. It is a 4-layer board. KiCAD was used with all traces hand routed except for the row CDEF interconnect which was auto-routed. The KiCAD footprint for the Unibus connectors is program-generated. This makes it relatively easy to make small mechanical corrections such as for the pin tail spacings used by different card connectors. And also for placement of the Unibus signal silkscreen labels.
 
PUniBone.PCB
(Click to enlarge)
 
 

Status:

I have my 11/04 CPU card running successfully now. The PUniBone emulates memory, DL11, KW11 using the original UniBone code and a switch/display register device I added. CQKC passes and Mini-Unix runs. See CQKC output below.
 
I have published an editable binary listing of CQKC revision D which matches the only known online copy of the documentation (containing the commented source code). There was previously no matching revision of the CQKC binary and doc which made interpreting error messages (which display the PC of the failing test) difficult. An accompanying program translates the binary listing into a standard .abs file the UniBone can load. Conditional compilation allowed extension of CQKC to support the 11/04 /20 and /34 processors in addition to its original support of the /05 /40 and /45. For example CQKC found a few minor bugs in the UniBone "cpu20" /20 (KA11) soft-processor. See here: https://github.com/jks-prv/MAINDEC-CQKC
 
root@unibone:~# cat 10.03_app_demo/5_applications/maindec/cqkc.cmd
# Inputfile to execute CQKC diagnostic
# Uses real Unibus CPU and emulated DL11/console
# Read in with command line option "demo --cmdfile ..."
#
# Listing corresponding to CQKC rev D:
# bitsavers.informatik.uni-stuttgart.de/pdf/dec/pdp11/xxdp/diag_listings/
1140_45/028_MAINDEC-11-DCQKC-D_D_1140_1145_INSTRUCTION_EXERCISER_Sep74.pdf
d # device test menu
u 22 1 # assert DCLO
m a  # emulate all memory
sd dl11
p p ttyS2 # use "UART2" connector, see FAQ
p b 1200
p console 1 # also use console
en dl11 # switch on emulated DL11
en kw11 # enable KW11 on DL11-W
m lp CQKC_D_34_40_45.abs # load test program
sd swreg
en swreg
p swr 14200 # switch register value for CQKC
p
u 22 0 # de-assert DCLO
root@unibone:~# ./cqkc.sh
demo - UniBone test application.
Version DBG v1.5.0, compile Feb 18 2021 21:18:56.
(Lots of UniBone output skipped. CQKC serial output follows.)
OPT.CP= 001400 (1000 = KW11-L present, 400 = console TTY present)
THE QUICK BROWN FOX JUMPS OVER THE LAZY DOGS BACK 0123456789 PASS# 0000
THE QUICK BROWN FOX JUMPS OVER THE LAZY DOGS BACK 0123456789 PASS# 0001
DCQKC DONE
THE QUICK BROWN FOX JUMPS OVER THE LAZY DOGS BACK 0123456789 PASS# 0000
THE QUICK BROWN FOX JUMPS OVER THE LAZY DOGS BACK 0123456789 PASS# 0001
DCQKC DONE
THE QUICK BROWN FOX JUMPS OVER THE LAZY DOGS BACK 0123456789 PASS# 0000
THE QUICK BROWN FOX JUMPS OVER THE LAZY DOGS BACK 0123456789 PASS# 0001
DCQKC DONE
THE QUICK BROWN FOX JUMPS OVER THE LAZY DOGS BACK 0123456789 PASS# 0000
^C^C
root@unibone:~#
 
The IR image below shows why you must maintain some amount of airflow for cooling even with this standalone test bed. The microcode PROMs (top left) get to 60 degrees C very quickly with no cooling.
 
PUniBone.FLIR
 
 
I think this project definitely meets Joerg's definition of a Frankenstein PDP-11 !